Strained-Si Heterostructure Field Effect Devices »

A combination of the materials science, manufacturing processes, and pioneering research and developments of SiGe and strained-Si have offered an unprecedented high level of performance enhancement at low manufacturing costs. Encompassing all of these areas, Strained-Si Heterostructure Field Effect Devices addresses the research needs associated with the front-end aspects of extending CMOS technology via strain engineering. The book provides the basis to compare existing technologies with the future technological directions of silicon heterostructure CMOS.

After an introduction to the material, subsequent chapters focus on microelectronics, engineered substrates, MOSFETs, and hetero-FETs. Each chapter presents recent research findings, industrial devices and circuits, numerous tables and figures, important references, and, where applicable, computer simulations. Topics covered include applications of strained-Si films in SiGe-based CMOS technology, electronic properties of biaxial strained-Si films, and the developments of the gate dielectric formation on strained-Si/SiGe heterolayers. The book also describes silicon hetero-FETs in SiGe and SiGeC material systems, MOSFET performance enhancement, and process-induced stress simulation in MOSFETs.

From substrate materials and electronic properties to strained-Si/SiGe process technology and devices, the diversity of R&D activities and results presented in this book will no doubt spark further development in the field.

Introduction     1
Heterostructure Field-Effect Devices     7
Substrate Engineering     8
Substrate-Induced Strain Engineering     9
Process-Induced Stress Engineering     10
Orientation-Dependent Mobility Engineering     11
Gate Dielectrics on Engineered Substrates     12
Strained-Si Technology: Process Integration     13
Nonclassical CMOS Structures     14
Strain-Engineered Hetero-FETs: Modeling and Simulation     16
Summary     17
References     8
Strain Engineering in Microelectronics     23
Stress Induced During Manufacturing     26
Global vs. Local Strain     32
Substrate-Induced Strain     35
Process-Induced Stress     37
Mechanical Stress Control     43
Substrate Orientation Dependence     46
Strained-Ge     48
Stress/Strain Analysis     48
Summary     52
References     53
Strain-Engineered Substrates     59
Epitaxy     60
Heteroepitaxy and Strain Control     64
Engineered Substrates: Technology     71
Virtual Substrates     73
Substrate Specifications     79
Strained-Si on Insulator     81
Smart-Cut     87
Hybrid Substrates     89
GeOI Substrates     90
Characterization of Strained Layers     93
XRD     96
SIMS     100
Raman     101
Engineered Substrates     106
Mobility Comparison     106
Thermal Conductivity     109
Summary     111
References     111
Electronic Properties of Engineered Substrates     119
Substrate-induced Strained-Si     120
Energy Gap and Band Structure     122
Electron Mobility     134
Hole Mobility     138
Field Dependence     141
Doping Dependence     145
Carrier Lifetime     146
Mobility: Thickness Dependence     150
Mobility: Temperature Dependence     157
Diffusion in Strained-Si     159
Process-induced Strained-Si     160
Hole Mobility     166
Electron Mobility     170
Uniaxial vs. Biaxial Strain Engineering     176
Summary     179
References      180
Gate Dielectrics on Engineered Substrates     189
Strained-Si MOSFET Structures     190
Thermal Oxidation of Strained-Si     191
Ge Diffusion     193
Kinetics: Oxidation of Si[subscript 1-x]Ge[subscript x] Layers     197
Oxidation of Strained-Si Layers     198
Rapid Thermal Oxidation     200
Plasma Nitridation of Strained-Si     203
Effect of Surface Roughness     207
Effect of Strained-Si Layer Thickness     210
High-k Gate Dielectrics on Strained-Si     220
Microwave Plasma Deposition     225
Chemical Analysis     226
Conduction Mechanism     230
Reliability Issues     232
Gate Dielectrics on Ge     234
Summary     234
References     235
Heterostructure SiGe/SiGeC MOSFETs     245
SiGe/SiGeC: Material Parameters     247
SiGe Hetero-FETs: Structures and Operation     250
SiGe p-MOSFETs on SOI     267
SiGeC Hetero-FETs     273
SiGe-based HEMTs     277
Design Issues     281
Gate Engineering     281
Layer Design     286
Summary      287
References     288
Strained-Si Heterostructure MOSFETs     295
Operating Principle     296
Threshold Voltage     297
Uniaxial Stress: Process Flow     306
Strained-Si MOSFETs with SiC-Stressor     309
Biaxial Strain: Process Flow     315
Scaling of Strained-Si MOSFETs     323
Layout Dependence     333
Thickness Dependence     338
Orientation Dependence     341
Hetero-FETs: Single Gate vs. Double Gate     344
Hetero-FET: Dual Channel Structure     346
Strained-Si MOSFETs: Reliability     353
Self-heating     358
Industry Example: TSMC     360
Industry Example: AMD     370
Summary     371
References     376
Modeling and Simulation of Hetero-FETs     385
Simulation of Hetero-FETs     386
Strained-Si Material Parameters for Modeling     387
Simulation of Strained-Si n-MOSFETs     390
Characterization of Strained-Si Hetero-FETs     399
TCAD: Strain-engineered Hetero-FETs     400
Spice Parameter Extraction     409
Performance Assessment      412
Summary     415
References     417
Index     421